TMS320C6711BGFN100

Product Summary

The TMS320C6711BGFN100 is a floating-point digital signal processor. The TMS320C6711BGFN100 device is based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making the DSP an excellent choice for multichannel and multifunction applications. With performance of up to 900 million floating-point operations per second (MFLOPS) at a clock rate of 150 MHz, the C6711/C6711B device offers cost-effective solutions to high-performance DSP programming challenges. The TMS320C6711BGFN100 possesses the operational flexibility of high-speed controllers and the numerical capability of array processors.

Parametrics

TMS320C6711BGFN100 absolute maximum ratings: (1)Supply voltage range, CVDD (see Note 2): -0.3 V to 2.3 V; (2)Supply voltage range, DVDD (see Note 2): -0.3 V to 4 V; (3)Input voltage ranges: (C6711C/C6711D only): -0.3 V to 4 V; (4)Output voltage ranges: (C6711C/C6711D only): -0.3 V to 4 V; (5)Operating case temperature ranges, TC: (default): 0℃ to 90℃; (6)(A version) [C6711BGFNA and C6711CGDPA]: -40℃ to 105℃; (7)Storage temperature range, Tstg: -65℃ to 150℃.

Features

TMS320C6711BGFN100 features: (1)Excellent-Price/Performance Floating-Point Digital Signal Processors (DSPs): TMS320C67x. (C6711, C6711B, C6711C, and C6711D); Eight 32-Bit Instructions/Cycle; 100-,150-,167-,200-,250-MHz Clock Rates; 10-, 6.7-, 6-, 5-, 4-ns Instruction Cycle Time; 600, 900, 1000, 1200, 1500 MFLOPS; (2)16-Bit Host-Port Interface (HPI); (3)Two Multichannel Buffered Serial Ports (McBSPs), Direct Interface to T1/E1, MVIP, SCSA Framers; ST-Bus-Switching Compatible; Up to 256 Channels Each; AC97-Compatible; Serial-Peripheral-Interface (SPI) Compatible (Motorola.); (4)Two 32-Bit General-Purpose Timers; (5)Flexible Phase-Locked-Loop (PLL) Clock Generator [C6711/11B]; (6)Flexible Software Configurable PLL-Based Clock Generator Module [C6711C/11D]; (7)A Dedicated General-Purpose Input/Output (GPIO) Module With 5 Pins [C6711C/11D]; (8)IEEE-1149.1 (JTAG.) Boundary-Scan-Compatible; (9)256-Pin Ball Grid Array (BGA) Package (GFN Suffix) [C6711/C6711B Only]; (10)272-Pin Ball Grid Array (BGA) Package (GDP Suffix) [C6711C/C6711D Only]; (11)CMOS Technology, 0.13-μm/6-Level Copper Metal Process; (12)(C6711C/C6711D); 0.18-μm/5-Level Copper Metal Process (C6711/11B); (13)3.3-V I/O, 1.4-V Internal (C6711D.250); (14)3.3-V I/O, 1.20-V Internal (C6711C/C6711D); (15)3.3-V I/O, 1.8-V Internal (C6711B/C6711.100); (16)3.3-V I/O, 1.9-V Internal (C6711-150).

Diagrams