(China (Mainland))
Product Summary
The TLK10021GWQ is a single-chip dual signal conditioning transceiver. The TLK10021GWQ supports data rates from 1.0 Gbps up to 1.3 Gbps. An on-chip clock generation phase-locked loop(PLL) generates the required half-rate clock from an externally applied reference clock. This reference clock equals approximately one tenth of the data rate. It may be off frequency from both received data streams by up to ±200 ppm. Both data paths are implemented identical. The implemented input buffers provide an input sensitivity of 400mVp-p differential. The applications of the TLK10021GWQ include Resynchronization in Both Directions for 1.25 Gbps Links, Repeater for 1.0625 Gbps Applications.
Parametrics
TLK10021GWQ absolute maximum ratings: (1)VDD, Supply voltage(2): -0.3 V to 2.5 V; (2)VCMOS, Voltage range at CMOS input terminals (ENA, ENB, LBA, LBB, RCLK)(2): -0.3 V to 3.0 V; (3)Electrical discharge: 2k V (HBM); (4)TA, Characterized free-air temperature range (no airflow): 0℃ to 70℃; (5)TSTG, Storage temperature range: -65℃ to 85℃.
Features
TLK10021GWQ features: (1)Fully Integrated Signal Conditioning PLLs Transceiver; (2)Supports Loop-Back Modes; (3)1.0–1.3 Gbps Operation Temperature Rating 0℃ to 70℃; (4)Low Power CMOS Design (<300 mW); (5)Small Footprint 4 mm × 4 mm 24-Lead QFN; (6)High Differential Output Voltage Swing Package (1600 mVp-p typical); (7)400 mVp-p Differential Input Sensitivity; (8)High Input Jitter Tolerance 0.606 UI; (9)Single 1.8 V Power Supply; (10)2.5 V Tolerant Control Inputs; (11)Differential VML Transmit Outputs With No External Components Necessary.
Diagrams
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 TLK10021GWQ |
Texas Instruments |
Ethernet ICs XAUI to XFI Transceiver |
Data Sheet |
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