(China (Mainland))
Product Summary
The TFP101PZP is a digital receiver, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP101PZP finds applications in any design requiring high-speed digital interface. The TFP101PZP supports display resolutions up to XGA in 24-bit true color pixel format. The TFP101PZP offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.
Parametrics
TFP101PZP absolute maximum ratings: (1)Supply voltage range, DVDD, AVDD, OVDD, PVDD: -0.3 V to 4 V; (2)Input voltage range, logic/analog signals: -0.3 V to 4 V; (3)Operating ambient temperature range: 0 to 70℃; (4)Storage temperature range: -65 to 150℃; (5)Case temperature for 10 seconds: 260℃; (6)Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 260℃; (7)Package power dissipation/PowerPAD.: Soldered: 4.3W; (8)Not soldered: 2.7 W; (9)ESD Protection, all pins: 2.5 KV Human Body Model; (10)JEDEC latchup (EIA/JESD78): 100mA.
Features
TFP101PZP features: (1)Supports XGA Resolution (Output Pixel Rates Up to 86 MHz); (2)Digital Visual Interface (DVI) Specification Compliant; (3)True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock; (4)Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching; (5)Skew Tolerant Up to One Pixel Clock Cycle; (6)4x Over-Sampling; (7)Reduced Power Consumption . 1.8 V Core Operation With 3.3 V I/Os and Supplies2; (8)Reduced Ground Bounce Using Time Staggered Pixel Outputs; (9)Lowest Noise and Best Power Dissipation Using TI PowerPAD. Packaging; (10)Advanced Technology Using TI 0.18μm EPIC-5. CMOS Process; (11)TFP101A Incorporates HSYNC Jitter Immunity.
Diagrams
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 TFP101PZP |
Texas Instruments |
Display Interface IC PanelBus DVI Receiver 86MHz |
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TFP101PZPG4 |
Texas Instruments |
Display Interface IC PanelBus DVI Rcvr |
Data Sheet |
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