Product Summary
The DP83815DUJB is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. It is targeted at low-cost, high volume PC mother boards, adapter cards, and embedded systems. The DP83815DUJB fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. The DP83815DUJB is an integration of an enhanced version of the National Semiconductor PCI MAC/BIU (Media Access Controller/Bus Interface Unit) and a 3.3V CMOS physical layer interface.
Parametrics
DP83815DUJB absolute maximum ratings: (1)Supply Voltage (VDD):-0.5 V to 3.6 V, 3.3 V PCI signaling, 5.0 V tolerant; (2)DC Input Voltage (VIN):-0.5 V to 7.0 V; (3)DC Output Voltage (VOUT):-0.5 V to VDD + 0.5 V; (4)Storage Temperature Range (TSTG):-65℃ to 150℃; (5)Power Dissipation (PD):743 mW; (6)Body Temp. (TB) (Soldering, 10 sec):220℃; (7)ESD Rating:2.0kV.
Features
DP83815DUJB features: (1)Statistics gathered for support of RFC 1213 (MIB II), RFC 1398(Ether-like MIB), IEEE 802.3 LME, reducing CPU overhead for management; (2)Internal 2 KB Transmit and 2 KB Receive data FIFOs; (3)Serial EEPROM port with auto-load of configuration data from EEPROM at power-on; (4)Flash/PROM interface for remote boot support; (5)Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer; (6)IEEE 802.3 10BASE-T transceiver with integrated filters; (7)IEEE 802.3u 100BASE-TX transceiver; (8)IEEE 802.3u Auto-Negotiation - advertised features configurable via EEPROM; (9)Full Duplex support for 10 and 100 Mb/s data rates; (10)Single 25 MHz reference clock; (11)144-pin LQFP and 160-pin LBGA packages; (12)Low power 3.3V CMOS design with typical consumption of 561 mW operating, 380 mW during WOL mode, 33 mW sleep mode; (13)IEEE 802.3u MII for connecting alternative external Physical Layer Devices.
Diagrams
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DP83815DUJB |
National Semiconductor (TI) |
Clock Generators & Support Products |
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DP83815DUJB/NOPB |
National Semiconductor (TI) |
Clock Generators & Support Products |
Data Sheet |
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