Product Summary

The CS8416-CZZR is a monolithic CMOS device that receives and decodes one of eight stereo pairs of digital audio data according to the IEC60958, S/PDIF, EIAJ CP1201, or AES3 interface standards. The CS8416-CZZR has a serial digital audio output port and comprehensive control ability through a selectable control port in Software Mode or through selectable pins in Hardware Mode. Channel status data are assembled in buffers, making read access easy. GPO pins may be assigned to route a variety of signals to output pins.

Parametrics

CS8416-CZZR absolute maximum ratings: (1)Power Supply Voltage, VA, VD,VL: 6.0 V; (2)Input Current, Any Pin Except Supplies, Iin: ±10mA; (3)Input Voltage, Vin: -0.3 (VL) to + 0.3 V; (4)Ambient Operating Temperature (power applied), TA: -55 to 125℃; (5)Storage Temperature, Tstg: -65 to 150℃.

Features

CS8416-CZZR features: (1)Complete EIAJ CP1201, IEC-60958, AES3, S/PDIF-Compatible Receiver; (2)+3.3 V Analog Supply (VA); (3)+3.3 V Digital Supply (VD); (4)+3.3 V or +5.0 V Digital Interface Supply (VL); (5)8:2 S/PDIF Input MUX; (6)AES/SPDIF Input Pins Selectable in Hardware Mode; (7)Three General Purpose Outputs (GPO) Allow Signal Routing; (8)Selectable Signal Routing to GPO Pins; (9)S/PDIF-to-TX Inputs Selectable in Hardware Mode; (10)Flexible 3-wire Serial Digital Output Port; (11)32 kHz to 192 kHz Sample Frequency Range; (12)Low-Jitter Clock Recovery; (13)Pin and Microcontroller Read Access to Channel Status and User Data; (14)SPI or I2C Control Port Software Mode and Stand-Alone Hardware Mode; (15)Differential Cable Receiver; (16)On-Chip Channel Status Data Buffer Memories; (17)Auto-Detection of Compressed Audio Input Streams; (18)Decodes CD Q Sub-Code; (19)OMCK System Clock Mode.

Diagrams

CS8416-CZZR block diagram

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