Product Summary

The CDCV304PWR is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) withminimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedancestate. The CDCV304PWR operates at nominal 3.3-V VCC.The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensurethat the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

Parametrics

CDCV304PWR absolute maximum ratings: (1)Supply voltage range, VCC:– 0.5 V to 4.6 V; (2)Input voltage range, VI (see Note 1):– 0.5 V to 7 V; (3)Voltage range applied to any output in the high state or power-off state,VO (see Note 1):– 0.5 V to 3.6 V; (4)Current into any output in the low state: IO64 mA; (5)Input clamp current, IIK (VI < 0):–18 mA ; (6)Output clamp current, IOK (VI < 0):– 50 mA; (7)Storage temperature range:– 65 to 150℃.

Features

CDCV304PWR features: (1)Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications; (2)Operates at 3.3-V VCC; (3)LVTTL-Compatible Inputs and Outputs; (4)Supports Mixed-Mode Signal Operation(5-V Input and Output Voltages With 3.3-VVCC); (5)Distributes One Clock Input to Ten Outputs; (6)Distributed VCC and Ground Pins ReduceSwitching Noise; (7)High-Drive Outputs (–32-mA IOH,32-mA IOL); (8)Significantly Reduces Power Dissipation.

Diagrams

CDCV304PWR logic diagram (positive logic)

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
CDCV304PWR
CDCV304PWR
Texas Instruments
Clock Buffer Gen Purpose and PCI-X 1:4 Clock Buff
Data Sheet
0-1: $1.58
1-25: $1.36
25-100: $1.23
100-250: $1.02
CDCV304PWRG4
CDCV304PWRG4
Texas Instruments
Clock Buffer Gen Purpose and PCI-X 1:4 Clock Buff
Data Sheet
0-1: $1.58
1-25: $1.31
25-100: $1.19
100-250: $1.02